| Signal Integrity Analysis |
High Speed Serial Channel Modeling
• Ethernet, PCIe, Rocket IO, Fibre Channel, SAS
• Anything Over 2Gb/s Requiring Frequency
Domain Simulation and Modeling
High Speed Memory Simulation
• DDR2, DDR3, DDR4
• Clock, Address, Data, Data Strobe
• Buffer Strengths, On Die Termination, Topology,
Waveform Integrity, Clock to Address, Slew Rate Calculations
• In-house EBD File Translation
CAD Guidelines
• PCB Layout Recommendations
Based on Pre-Layout Simulations
Software Resources
• Ansoft HFSS
o 3D Modeling of PCB structures
• Apsim RLGC
o 2D Modeling of PCB Transmission Lines
o Frequency-dependant W-elements
• HSpice
o Time Domain Simulation Using IBIS
o Frequency Domain Simulation
– Concatenation of S-Parameters
• Ethernet, PCIe, Rocket IO, Fibre Channel, SAS
• Anything Over 2Gb/s Requiring Frequency
Domain Simulation and Modeling
High Speed Memory Simulation
• DDR2, DDR3, DDR4
• Clock, Address, Data, Data Strobe
• Buffer Strengths, On Die Termination, Topology,
Waveform Integrity, Clock to Address, Slew Rate Calculations
• In-house EBD File Translation
CAD Guidelines
• PCB Layout Recommendations
Based on Pre-Layout Simulations
Software Resources
• Ansoft HFSS
o 3D Modeling of PCB structures
• Apsim RLGC
o 2D Modeling of PCB Transmission Lines
o Frequency-dependant W-elements
• HSpice
o Time Domain Simulation Using IBIS
o Frequency Domain Simulation
– Concatenation of S-Parameters
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